1. Field
The following description relates to packaging technology for electronic components, and particularly, to embedded package technology for electronic components.
2. Description of the Related Art
As the performance of information technology (IT) devices is improved, mobile IT devices are becoming light-weighted, thin and small. Further, with the integration of various types of modules into a single electronic device becoming widespread, embedded package technology, which is capable of embedding various electronic components (such as an integrated circuit (IC) chip, a capacitor, a resistor, an inductor, an antenna, a micro-electro-mechanical-systems (MEMS) device, and the like) into a system substrate and contributing to the reduction of the size, thickness and weight of IT devices, has been developed.
The embedded package technology is characterized by embedding at least some electronic components in a system substrate, whereas surface mount technology (SMT) is characterized by mounting electronic components on the top surface of a system substrate. Printed circuit boards (PCB) or multilayer PCBs may be suitable for use in the embedded package technology as system substrates. As compared to the SMT, the embedded package technology can increase the packaging density for electronic components, reduce the length of the connections between electronic components and thus improve the reliability of the connection between the electronic components, and reduce the thickness of a whole package.
The embedded package technology, which uses multilayer PCBs, can be classified into ‘during lamination’ embedding and ‘after lamination’ embedding. The ‘during lamination’ embedding technique, which is characterized by embedding electronic components during the lamination of the layers of a core layer and/or a build-up layer of a multilayer laminate package, can provide excellent electrical properties, but fails to ensure a high yield of electronic devices and reworkability for faulty electronic components. On the other hand, the ‘after lamination’ embedding technique, which is characterized by embedding electronic components after the lamination of the layers of a core layer and/or a build-up layer of a multilayer laminate package, can provide a high yield of electronic devices and high reworkability, but can be responsible for poor electrical properties, which causes disadvantages given that it is required to ensure excellent electrical properties between the layers of a core layer or a build-up layer of a multilayer laminate package and between the core layer and the build-up layer.